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NAIST Application NoP05-10



TitleSOLID-STATE IMAGING ELEMENT AND SIGNAL READING METHOD THEREOF
INVENTORKAGAWA, Keiichiro; (JP).OHTA, Jun; (JP).
Pub.NoWO/2007/000879Pub Date04.01.2007
International Application NoPCT/JP2006/311313International Application Date 06.06.2006

abstractAfter resetting a potential (VPD) of a photodiode (11) to a prescribed potential (VRST), light is permitted to enter the photodiode (11) for a prescribed period, and the VPD is reduced by a quantity corresponding to the light entered. Then, when a falling ramp voltage (VRAMP) is applied to a source terminal of a first transistor (12), i.e. a source grounding type amplifier for reading VPD, the MOS transistor (12) is turned on and the output is rapidly reduced when a voltage difference between a gate and a source of the MOS transistor (12) exceeds a threshold voltage. When a signal having a pulse width from a ramp voltage sweep start point to an output rapid drop point is generated by a comparator circuit (4), the pulse width corresponds to the quantity of the light entered. When such PWM system signal reading is performed, power consumption is reduced while ensuring a dynamic range, and furthermore, a high pixel rate can be achieved by reducing the pixels.
National PhaseJP 19.10.2007 2007523379